on-demand webinar

Nokia: Experience in Adopting HLS and HLV Methodology

Estimated Watching Time: 13 minutes

Share

Title slide from Nokia: Experience in Adopting High-Level Synthesis and High-Level Verification Methodology

Ever increasing requirements for shorter time to market and better resource usage are challenging us to explore different ways on how to improve our design and verification methodology. One of the solutions Nokia has explored is raising abstraction level in both RTL design and verification with the help of High-Level Synthesis and Verification tools.

Meet the speaker

Nokia

Eerik Niskanen

IP verification lead in Nokia Digital Front End ASIC

Eerik has been working in Nokia since 2019. He is currently focusing on UVM and High Level Verification and is a key member of HLS core team for Digital Front End SoCs.

Related resources

5 best practices for mastering surface modeling
White Paper

5 best practices for mastering surface modeling

Improve the workflows of your surfacing projects

A better way to track and manage requirements for complex products and distributed teams
E-book

A better way to track and manage requirements for complex products and distributed teams

A better way to track and manage requirements for complex products..

7 techniques for creating production-ready CAD drawings
White Paper

7 techniques for creating production-ready CAD drawings

In the engineering world, drawings are everything. Without CAD drawings, many 3D models would be virtually impossible to manufacture.