High-Level Synthesis Verification Technologies and Techniques
When designing with High-Level Synthesis (HLS) many have questions regarding verification. Waiting to verify until you have post-HLS RTL is too late and too inefficient. This session will describe applying known and trusted static, formal and dynamic approaches to verification performed at the C++ or SystemC HLS level of abstraction.
발표자 소개
David Aerne
Verification Technologist
Dave Aerne is a Verification Technologist within the Calypto Systems Division, focusing on HLV (High-Level Verification) solutions. His particular areas of expertise are the UVM and Verification IP. Prior to joining the EDA industry, he gained over 18 years of SoC Design and Verification experience in various roles at semiconductor companies and fabless startups. Dave received a BSCompE from the University of Illinois at Urbana-Champaign and a MSCompE from National Technological University in Fort Collins, Colorado.
관련 자료
블루닷: Catapult-HLS를 이용한 NN기반의 DeepField-PQO 설계 가속화
고화질 영상에 대한 시장의 수요 증가로 인해 높은 인코딩 비용에 대한 비디오 서비스 제공 업체의 부담이 커지고 있습니다. 이 문제를 해결하기 위해 블루닷은 비디오 인코딩 효율을 향상시키는 AI 기반의 CODEC용 전처리 DeepField-PQO 필터를 개발하였습니다. 블루닷은 필터를 FPGA용 IP로 빠르게 구현하기 위해 HLS를 활용하고, ASIC용으로는 Catapult HLS를 활용하였습니다.
Xperi®: A Designer’s Life with HLS
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