Neural Network Quantization for Low-Power

Russell Klein is a Program Director at Siemens EDA’s (formerly Mentor Graphics) High-Level Synthesis Division focused on processor platforms. He is currently working on algorithm acceleration through the offloading of complex algorithms running as software on embedded CPUs into hardware accelerators using High-Level Synthesis. He has been with Mentor for over 25 years, holding a variety of engineering, marketing and management positions, primarily focused on the boundary between hardware and software. He holds six patents in the area of hardware/software verification and optimization. Prior to joining Mentor he worked for Synopsys, Logic Modeling, and Fairchild Semiconductor.

Ajay Mishra is a Senior Product Deployment Manager in Siemens EDA’s High-Level Synthesis Division, currently working on physical realization of algorithm acceleration using High-Level Synthesis. Mr. Mishra developed a methodology to determine power estimates based physical realization. Ajay Mishra has 22 years of experience, including semiconductor design work at STMicroelectronics, Intel, and Philips Semiconductors, and 14 years of EDA experience in Mentor Graphics (now Siemens EDA). At Siemens EDA he served as Product Deployment Engineer to facilitate the proliferation and deployment of C-to-GDSII products, flows, and methodologies. Growing IC design complexities cause most IC architects to look for smart and efficient electronic design automation solutions to improve IC performance and time to market while avoiding technological barriers in between engineering domains.