Hardware Accelerators – Exploring Power and Performance in Today’s AI
The need for high-speed, low-power processing is at an all-time high. As emerging AI algorithms require thousands of computations, we can look to offload the processing from the CPU to a specifically designed hardware accelerator. This offboarding can lower the computation time, the power consumption, and the headache. Join us as we explore the design process from algorithm to hardware accelerator on a RISC-V processor as we quantify power consumption and performance.
講演者の紹介
Cameron Villone
Product Manager
Cameron has joined Siemens in August 2023 through the Atlas New Graduate Program. Cameron graduated from Rochester Institute of Technology with a Masters Degree in Electrical Engineering focusing on Robotics, Embedded Systems, and Computer Vision. Cameron has held previous student roles at General Motors and Texas Instruments. Cameron is currently working primarily on marketing for low-level power estimation and analysis with the PowerPro team.
関連情報
シミュレーション駆動アプローチを使用して船舶を設計する方法
デジタルツールを取り入れた新しい船体設計アプローチを紹介するこのウェビナーをぜひご覧ください。すべての要件に確実に準拠し、設計プロセスのスパイラルを回避します。
シミュレーション・ツールを活用して船舶設計プロセスを加速
船舶設計の非効率なデザイン・スパイラルを脱却しましょう。このホワイトペーパーは、シーメンスのソリューションを使用したシミュレーション主導型船舶設計プロセスについて紹介しています。最新のデジタル技術をフル活用する方法をご一読ください。
Simulation process and data management for ship design
Learn how to create a seamless ship design workflow with simulation and data sharing. Ensure effective collaboration and provide the right information.