mPower – Analog EMIR at new heights
EMIR analysis is one of the final critical gates before tape-out. The chip passes DRC and LVS, but will it properly function, and will it have the expected lifetime? Due to the hierarchical nature of digital designs, detailed EMIR analysis is possible on chips that are even larger than reticle size for several years. Analog designs, however, have not been so fortunate, as the size of circuits that can be analyzed is limited by the capacity of the SPICE simulator. mPower Analog introduces both methodologies and capabilities that enable dynamic analysis of designs with 100’s of millions of transistors – analyses that were not possible before. This session will share some of the key capabilities and success stories for mPower.
Meet the Speaker
Joe Davis
Sr. Director for DDCP Analysis Product Management
Joseph Davis is senior director Sr. Director for DDCP Analysis Product Management including mPower power integrity analysis tools at Siemens Digital Industries Software, where he drives innovative new products to market. Prior to joining Siemens, Joseph managed yield simulation products and yield ramp projects at several leading semiconductor fabs, directing yield improvement engagements with customers around the world and implementing novel techniques for lowering the cost of new process technology development. Joseph earned his Ph.D. in Electrical and Computer Engineering from North Carolina State University. He can be reached at davis.joseph@siemens.com.