As digital design complexity grows and process technologies advance, achieving aggressive power, performance, and area (PPA) targets within tight schedules has become increasingly difficult. These challenges are further amplified by the need for design expertise and massive compute resources, in the face of shrinking talent pools and the push for more cost efficiency.
In this presentation, we explore how Aprisa AI is delivering on its potential to level-up the productivity of digital design teams, and on the achievable PPA of digital flows. From natural language interfaces to automation of complex decisions, and better optimization between PPA tradeoffs, Aprisa AI offers a path getting better results, faster.
Meet the Speaker
Janet Attar
Principal Product Manager
Janet Attar is Principal Product Manager at Siemens EDA for the Aprisa RTL-to-GDS digital implementation solution, including responsibility for Aprisa AI planning and development. Prior to Siemens, she was a Staff Applications Engineer at Cadence, where she worked with customers to develop silicon chips for consumer electronics, and a Senior Physical Design Engineer for International Rectifier (now Infineon), where she worked on digital controllers. Janet holds a B.Eng in Electrical Engineering from Carleton University.