In this session we will look at how Catapult High-Level Synthesis is more than just converting C++/SystemC to RTL. We will look at language choice, coding implications, architecture exploration, power estimation and optimizations that all work to deliver competitive RTL in a faster time with lower cost.

Meet the Speaker

Siemens EDA

Stuart Clubb

Technical Product Management Director

Stuart is responsible for Catapult HLS Synthesis and Verification Solutions since July 2017. Prior to this role, Stuart had been successfully managing the North American FAE team for Mentor/Siemens and Calypto Design Systems and was key to the growth achieved for the CSD products after the Calypto acquisition. Moving from the UK in 2001 to work at Mentor Graphics, Stuart held the position of Technical Marketing Engineer, initially on the Precision RTL synthesis product for 6 years and later on Catapult for 5 years. He has held various engineering and application engineering roles ASIC and FPGA RTL hardware design and verification. Stuart graduated from Brunel University, London, with a Bachelors of Science.

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