webinar na żądanie

Hardware Accelerators – Exploring Power and Performance in Today’s AI

Szacowany czas: 17 min

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The need for high-speed, low-power processing is at an all-time high. As emerging AI algorithms require thousands of computations, we can look to offload the processing from the CPU to a specifically designed hardware accelerator. This offboarding can lower the computation time, the power consumption, and the headache. Join us as we explore the design process from algorithm to hardware accelerator on a RISC-V processor as we quantify power consumption and performance.

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Siemens EDA

Cameron Villone

Product Manager

Cameron has joined Siemens in August 2023 through the Atlas New Graduate Program. Cameron graduated from Rochester Institute of Technology with a Masters Degree in Electrical Engineering focusing on Robotics, Embedded Systems, and Computer Vision. Cameron has held previous student roles at General Motors and Texas Instruments. Cameron is currently working primarily on marketing for low-level power estimation and analysis with the PowerPro team.

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