STMicroelectronics: In sensor Bricks Multi-objective Optimization of an Algorithm Chain for In-Sensor Processing
In the dynamic and ever-advancing field of semiconductor technology, the fusion of digital methodologies with traditionally analog functions is gaining critical importance. High-Level Synthesis (HLS) emerges as a key enabler in this transformative process, particularly for products with analog foundations. HLS acts as a conduit between the realms of software and hardware, allowing designers to articulate intricate algorithms in high-level programming languages that are subsequently and seamlessly translated into precise hardware descriptions. This synthesis technique is particularly beneficial in the sensor domain, where the race to introduce high-quality features first to the market is intense. At STMicroelectronics R&D, we have developed a novel modular approach that capitalizes on our extensive knowledge of end-use applications coupled with our proficiency in digital signal processing (DSP). This strategy involves the creation of adaptable modules that take full advantage of HLS, enhanced by a bespoke communication protocol that facilitates interaction between the blocks. Utilizing a comprehensive dataset and a sophisticated multi-objective optimization algorithm, we are able to swiftly customize algorithms that can be embedded directly into sensors. This tailored approach ensures that we are equipped to rapidly conceive and implement advanced functionalities, thereby preserving our competitive advantage in the marketplace. Through HLS and our innovative modular system, STMicroelectronics continues to lead in the seamless integration of digital intelligence into analog native products, setting new standards for efficiency and market responsiveness.
발표자 소개
Marco Castellano
Digital Design Manager
Marco Castellano earned his Laurea degree from the University of Pavia, Italy, in 2005. He continued his studies at the same university, completing a Ph.D. in electrical engineering in 2009. His doctoral research was a collaborative effort between the University of Pavia and STMicroelectronics, focusing on the creation of high-speed, low-power arithmetic circuits for Digital Signal Processing. In 2016, Marco advanced to a leadership role within an R&D team at STMicroelectronics, where he was instrumental in driving the innovation of embedded processing in analog products and sensors. His contributions to the field are documented in a series of published papers, presentations at scientific conferences, and a portfolio of patents, all centered around the integration of algorithms.
Sandro Dalle-Feste
IC Design Senior Director within Analog & MEMS Group R&D and Strategy
Sandro Dalle Feste graduated from Politecnico of Milan in 1992 with a degree in Electronic Engineering. He joined STMicroelectronics in 1993, working on Sigma Delta Converters and Digital Signal Processing on CMOS processes. In the late 90s, he expanded his expertise to include wide band and high-speed circuits and converters, eventually becoming a Design Manager for High Speed IPs primarily for communication systems. During this time, he was responsible for designing various products in both CMOS and BICMOS processes. He later transitioned to Audio products, where he developed a full family of digital power amps for Home Systems and TV applications, and gained experience with BCD technologies. In 2010, he became a Product Development Manager, supervising system platform developments in collaboration with strategic customers, including ASICS and MEMS devices, ranging from MEMS sensors to actuators. Throughout his career, he has authored technical publications and patents.Currently, Sandro Dalle Feste serves as the IC Design Senior Director within APMS -Analog & MEMS Group R&D and Strategy, where he is responsible for leading strategic and innovative programs. He is also a member of the scientific technical committee for JRC STEAM, a joint research center between STMicroelectronics and Politecnico di Milano.