Accelerating design closure with Aprisa RTL-to-GDS solution
As chip designs grow in complexity and time-to-market windows shrink, RTL-to-GDS implementation has become a critical bottleneck. Design teams face mounting pressure to deliver power, performance, and area (PPA) metrics while navigating design complexity challenges, pre- and post-route convergence, and steep learning curves. Aprisa addresses these pain points and helps teams accelerate design cycles while achieving design metrics. With fast and predictable design closure, better PPA, and out-of-the-box reference flows, Aprisa enables rapid ramp-up better quality of results across all technology nodes.
講演者の紹介
Wei Lii Tan
Director, Product Management | Aprisa, Digital Design Creation Platform
Wei Lii Tan is Director of Product Management at Siemens DI SW’s Digital Design Creation Platform division, leading product management for the Aprisa RTL-to-GDS solution. Wei Lii has 20 years of experience in semiconductor and EDA, delivering solutions that help designers achieve faster, more efficient design closure through innovative new technologies. He has a master’s degree in electrical engineering from Mississippi State University, and an M.B.A. from Santa Clara University.