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ADCs: Tackling Design, Verification and Characterization Challenges of High-Performance, High-Accuracy, Low-Power Data Converters

Condividi

ADCs: Tackling Design, Verification and Characterization Challenges of High-Performance, High-Accuracy, Low-Power Data Converters

This presentation explores the design, verification, and silicon data performance of an Analog Bits Low Power SerDes fabricated in TSMC 16FFC process technology and verified using the AFS Platform.

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Circuit Design and Verification of 7nm Low-Power, Low-Jitter PLLs
Webinar

Circuit Design and Verification of 7nm Low-Power, Low-Jitter PLLs

Learn how Silicon Creations met the stringent circuit verification and noise analysis requirements for their latest 7nm high performance analog and mi