NVIDIA: Advanced routing and interfaces in untimed C++ driven Catapult HLS for near RTL-level flexibility
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New broadcast, demuxed sharing, partially common demuxed sharing, combinational crossbar, and direct (unregistered) output capabilities in the untimed C++ flow in Catapult High-Level Synthesis enable precise control for hardware designers to optimize complex datapaths for area and power savings. This allows them to enjoy the best of both worlds – the simplicity of describing their algorithms in C++ for productivity and the ability to specify precise control where needed. This presentation goes over a scaler algorithm implemented with butterfly architecture to demonstrate how these new Catapult features can be used for significant power and area savings.
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Moises Garcia
Hardware Designer / HLS Methodology
Moises Garcia has over a decade of High-Level Synthesis (HLS), High-Level Verification (HLV) and RTL experience, through his work in both chip design teams and EDA methodology support to designers. This has exposed him to a wide variety of designs and architectural needs, enabling him to sharpen his skills in writing effective design code in C++ / SystemC and contribute to broadening the scope of Catapult HLS solutions through tool support enhancements. He is currently a Senior Hardware Designer / HLS Methodologist at Nvidia, specializing in video and display applications.