Webinar

EXPERT SERIES: PDN Decoupling Optimizer Using TOUCHSTONE and SPICE Models

June 17, 2021 09:00 AM US/Pacific

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The PDN Optimizer reduces the bypass capacitor count substantially, sometimes by as much as 50%. In addition to the default RLC models, we will discuss in detail how to set up the capacitor arrays using manufacturer touchstone and spice files for increased accuracy. The process of converting the capacitor data into caplib files for group insertion into the Optimizer will be explained. Impedance profiles for the three model types will be compared. The importance of capacitor value, type, case size, and location will be discussed.

What you will learn:
• The difference between Import/Import Folder/Append/Export
• Comparison of the Optimizer and Decoupling Analysis impedance profiles
• Run the Optimized solution with Touchstone files replacing the RLC models
• Run the Optimized solution with Spice files replacing the RLC models

Who should attend?
• Power Integrity Engineers
• Signal Integrity Engineers
• PCB Design engineers
• Engineering Managers

 

 

Meet the speakers

Photo of Ken Cantrell

Ken Cantrell

Corporate Application Engineer

Ken Cantrell is a Corporate Application Engineer focused on the HyperLynx Signal Integrity and Power Integrity toolset. Ken started his engineering career with supercomputer and multi-processor server Signal Integrity and EMC designs. He has built and validated numerous mother board/daughter card rack mount designs in the HPC space. Ken has a Master of Science in Electrical Engineering degree from University of Colorado at Colorado Springs, with emphasis on EM Theory, Microwave, and RF chip design.

John Chaka

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