Deep Dive into “Low-Power Design is a Corporate Mindset at Arm”

When companies and designers choose ARM® IP, they often choose it because they know that ARM has provided scalable, low-power, high-performance IP from its inception. Most customers that use ARM IP are keenly interested in low-power architectures for their own products.

Low-Power Design is a Corporate Mindset at ARM

This technical webinar will take a deeper dive into the new white paper, Low-Power Design is a Corporate Mindset at ARM. It will go through the methodology and design flow developed and in use at ARM that incorporates Siemens’ PowerPro® RTL Low-Power Platform for creating and verifying RTL IP with power-efficiency as a top consideration. We will step attendees through the RTL development cycle — from requirements through implementation — and explain the power implications associated with each phase. We will share how this methodology can be used to automate power analysis, exploration, and reduction techniques to achieve the lowest possible power while meeting predictable design schedules.

What will you learn:

• How to create the lowest-power IP
• PowerPro’s methodology and design flow for creating and verifying
  RTL IP
• Power implications through the entire RTL development cycle
• Automated power analysis, exploration, and reduction techniques
• How to achieve the lowest possible power while meeting predictable
  design schedule

Who should attend:

• RTL Designers/Project leads
• Designers using ARM IP
• Low-Power Methodology specialist