This webinar explores key challenges associated with CMOS image sensor verification and introduces industry-proven solutions and methodologies to address them.
CMOS images sensors (CIS) are now the preferred image sensor across
various markets due to the ultra-compact size, high resolution, faster
frame rates, low power consumption, and low fabrication cost. Mobile
phones, being one of the biggest drivers of demand, now average three
cameras per phone and are expected to average four within the next
three years. The latest advanced driver-assistance systems (ADAS), in
the automotive market, are fueling the need for more sensors including
backup cameras, 360-degree surround view, video mirrors, and driver
monitoring. Medical imaging is not far behind, with growing demand for
specialized image sensors for surgical and other bio-medical
applications.
Verification of CMOS image sensors (CIS) is challenging on multiple
levels as they contain large arrays of pixels and replicated circuits.
CIS have extremely sensitive signal chains, affected by
non-uniformities at both the local and global level. Noise is often
cited as the most challenging aspect as it impacts the visible quality
of an image. Noise along with other factors must also account for
variability due to process, voltage, and temperature variation. Image
quality and robustness are the key requirements to win market share
across various applications. CIS verification requires comprehensive
block-level characterization for accurate noise analysis and top-level
verification to ensure performance and power specs are met in silicon.
This webinar will cover some key challenges associated with CMOS Image
sensor verification and introduce industry-proven solutions and
methodologies to address them.