VIP solutions for Protocol and Memory Verification

The silicon industry’s leading IP, FPGA, and IC design/verification teams are using Siemens EDA Verification IP solutions today to solve the verification of complex Protocol and Memory Interfaces. In this 30 minute session, we'll provide an introduction to the solutions available from Siemens EDA, a description of the key attributes of the Verification IP and Memory Model products, and a high level summary of how they can be used to bring quality and time-to-market value to your project.

What you will learn:

• The challenges of verifying today’s advanced interface and memory
  protocols
• The broad portfolio of Siemens EDA Verification IP solutions
  available today
• The architecture, features, and rigor you should expect from a good
  Verification IP solution

Who should attend:

• Design & Verification Engineers & Managers and those interested in
  Protocol or Memory Interface verification