on-demand webinar

Utilizing a Complete IP QA Framework to Improve Time-to-Market and Ensure Silicon Success

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Solido Crosscheck

Webinar Overview

Design IP is a key component of silicon production flows today, and IP validation is a key factor in determining time-to-market and silicon success. To be correctly integrated into chip-level or block-level designs, all IP must be validated for multiple design views by IP production and integration teams. IP issues discovered at chip-level signoff or after tape-out typically require costly ECO iterations or re-spins to rectify.

Solido Crosscheck provides a complete QA framework for the validation of all IP, across production and integration workflows. Crosscheck also enables IP suppliers and integrators to align on validation requirements and results through a common QA exchange deck, ensuring that all checking and reporting standards are accurately captured throughout the IP supply chain.

In this webinar, we will discuss common IP issues discovered, how Solido Crosscheck helps check for these issues, and how a common QA exchange deck can streamline validation cycles and reporting between IP suppliers and integration teams.

What will you learn

  • IP validation challenges and considerations
  • Common IP issues and downstream impact
  • In-view and cross-view validation checks for ensuring IP data integrity
  • Using a common QA exchange deck as supplier-integrator IP handshake
  • Example use cases

    • Who should attend

  • IP design, production and integration engineers
  • Centralized IP team verification engineers
  • Chip-level integration engineers
  • Digital IC design and implementation engineers
  • Standard cell, memory, full custom analog / digital IP design engineers

    • Meet the speaker

    Siemens EDA

    Wei-Lii Tan

    Principal Product Manager, ICVS AMS Product Marketing Verification

    Wei-Lii Tan is a principal product manager for Solido products in Siemens DISW’s AMS Verification division. Wei-Lii has 12 years of experience in semiconductor and EDA, having worked on both digital and analog products and methodologies. He has a master’s degree in electrical engineering from Mississippi State University.

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