Using HLS to Accelerate Computer Vision for Autonomous Drive
The algorithms to teach a computer to see, understand and make decisions for ADAS and Autonomous Drive systems require a significant amount of parallel compute performance executing at the lowest possible power. This video will introduce of why HLS (High-level Synthesis) is such a good fit for computer vision and deep learning and how it can be used adapt rapidly changing algorithms and/or trained neural networks to low-power, high performance custom hardware accelerators.
Meet the speaker
Ellie Burns
Former Director of Marketing
Ms. Burns has over 30 years of experience in the chip design and the EDA industries in various roles of engineering, applications engineering, technical marketing and product management. She was formerly the Director of Marketing for the Calypto Systems' Division at Siemens EDA responsible for low-power RTL solutions with PowerPro and HLS Solutions with Catapult. Prior to Siemens and Mentor, Ms. Burns held engineering and marketing positions at CoWare, Cadence, Synopsys, Viewlogic, Computervision and Intel. She holds a BSCpE from Oregon State University.
Related resources
SLEC System Factsheet
SLEC System is a good fit for design teams verifying their RTL implementation by formally comparing it against functional SystemC/C++ models
Catapult High-Level Synthesis and Verification Fact Sheet
Industry leading C++/SystemC High-Level Synthesis with Low-Power estimation/optimization. Design checking, code and functional coverage verification plus formal make HLS more than mere “C to RTL.
StreamTV’s SeeCubic: Catapult HLS enables Ultra-D 3D without glasses
StreamTV's SeeCubic faced an impossible task: develop a real-time conversion IP block for a custom SoC without knowing the target technology. This IP was critical for their glasses-free 3D solution.