User2User North America 2025 General Session
The general session's recording features keynotes from EDA visionaries and thought leaders exploring emerging trends, industry hot topics, and advancements in technology.
Are we ready? Succeeding in an AI-driven, software-defined world
In 2011, Marc Anderssen remarked that “software is eating the world”. While software has been eating the world, AI is now rewriting the entire menu—transforming not just what we consume, but how it's created, served, and experienced.
This transformation is creating unprecedented demand for computational resources, with AI workloads driving exponential growth in compute infrastructure requirements. In response, a new wave of software innovation is emerging to orchestrate, optimize, and manage these increasingly complex computational ecosystems—fueling unprecedented demand for semiconductors in our software-defined, silicon-enabled global economy.
Organizations worldwide are making substantial investments in software development capabilities to navigate this transformation. However, electronic development teams face formidable challenges: scaling limitations at the physical level, multi-domain design complexities, fragmented data links across system integration layers, and a thinning engineering workforce amidst growing talent scarcity.
Successfully addressing these obstacles requires leverage of a comprehensive digital twin that goes beyond simulation and embraces a multi-faceted approach: implementing production-grade AI tools, establishing robust requirements capture methodologies, and enabling seamless software/hardware co-design processes. As traditional chip scaling approaches physical constraints, advanced packaging technologies like chiplets and 3D IC design workflows become essential. Cross-domain data management within the silicon lifecycle must connect with broader platforms while preserving domain-specific insights. Strategic partnerships with foundries and service providers round out this comprehensive strategy for enabling responsive, software-driven design processes.
In this presentation, Mike Ellow, CEO of Siemens EDA, will unveil Siemens’ unique approach to maximize the possibilities of the digital twin for semiconductor & electronic design. By leveraging the most comprehensive digital twin framework for electronic systems, organizations can achieve the agility and integration needed to thrive in this new era of System-Driven-Systems Aware design—where software intelligence and silicon performance converge to create unprecedented capabilities and opportunities.
Mike Ellow, Chief Operating Officer, Siemens EDA
Does AI need EDA or does EDA need AI?
Today’s AI clusters are the most sophisticated, most complex technological marvels the world has ever seen. In this world, the unit of computing power is no longer the processor. Rather, it is an entire system of processors interconnected by a dense, high-bandwidth fabric. To continue to advance the state of the art in AI, designers must evolve from pure chip design to end-to-end system design, inclusive of on-package integrated optics or copper. This talk will address the multi-tiered complexity of AI infrastructure design and the opportunity for EDA tools to use this AI infrastructure in the service enabling a scalable system-level design process.
Sandeep Bharathi, Chief Development Officer, Marvell
Redefining compute: Why AI needs chiplets
Chiplet technology is redefining how the semiconductor industry approaches performance, scalability, and efficiency. As AI continues to drive demand for custom, high-throughput compute solutions, chiplet-based architectures offer a compelling path forward—enabling faster integration of specialized logic, memory, and connectivity within a single package.
This keynote will explore the role of chiplets in accelerating AI innovation, even as first time silicon success becomes increasingly challenged, and how proven silicon IP subsystems paired with robust verification is reducing time-to-market, and optimizing power and performance for advanced workloads.It will also touch on the growing relevance of chiplets across high-performance computing, 6G, and data center infrastructure. Customization is key because different applications call for different optimization priorities e.g. LLM Training calls for lowest possible latency but 6G calls for different priority mix. With a focus on connectivity as a key enabler, Alphawave Semi will highlight key areas where it is helping shape the future of compute through its chiplet platforms, silicon IP, and optical interconnect technologies.
"Alphawave Semi is shaping the future of AI through a modular and scalable approach to compute. By integrating advanced silicon IP, custom silicon, and high-speed optical connectivity, we’re enabling the next era of AI infrastructure—built on the power and flexibility of chiplets."
Mohit Gupta, Senior Vice President & General Manager, IP and Custom Silicon, Alphawave Semi
Meet the speakers
Mike Ellow
Chief Executive Officer
Mike Ellow is CEO, Siemens EDA, Siemens Digital Industries Software, a business unit of Siemens Digital Industries. He leads Siemens EDA (formerly Mentor Graphics) Research and Development as well as EDA Global Sales. Ellow has led Siemens EDA Sales since August 2014 and Siemens EDA ICS R&D since 2023. He brings 30 years of executive sales and technical management experience, along with a proven track record of building strong sales and engineering teams while delivering positive, predictable results. These results are built on a foundation of focusing on customer success.
Ellow joined Mentor Graphics in March 2014 as part of the company’s acquisition of Berkeley Design Automation, where he was Vice President of Worldwide Sales. Prior to that, he held various positions at Cadence Design Systems, overseeing sales in North America, Europe, and India, culminating in the role of Corporate Vice President, North American Sales. Prior to Cadence, he held management, marketing, and engineering positions in a number of different industries. He started his career as an electrical engineer at Hughes Aircraft.
Ellow has a BSEE from Lehigh University, an MSEE from the University of Southern California, and an MBA from California State University, Fullerton.
Mohit Gupta
Senior Vice President & General Manager, IP and Custom Silicon,
Mohit Gupta joined Alphawave in September 2022 as part of the OpenFive acquisition from SiFive. He currently serves as Senior Vice President and General Manager for IP and Custom Silicon Business unit. Mohit brings in more than 2 decades of experience in semiconductor IP and SoC domains leading worldwide engineering, application engineering, products, and field teams. Prior to Alphawave, he led the IP and Custom SoC business units at SiFive and Rambus.
Mohit holds a Bachelor of Engineering in Electronics and Communications from Thapar University and Master of Science in Microelectronics from BITS, Pilani. He also holds an executive MBA in International Business from Indian Institute of Management, Calcutta.
Sandeep Bharathi
Chief Development Officer
Sandeep Bharathi is Chief Development Officer at Marvell. In this role, he leads the company’s Central Engineering and Data Center Engineering teams. The Central Engineering team is responsible for leading-edge silicon research and development tools and methodologies, third party IP portfolio, Marvell AMS IP portfolio, advanced packaging, and design services – all critical for the development of Marvell silicon on advanced process technologies. The Data Center Engineering team supports the rapidly evolving needs of data center customers within a unified organization.
Prior to joining Marvell in 2019, Sandeep served as Vice President of Engineering at Intel, where he led FPGA product and technology development. Previously, he held a variety of senior engineering leadership roles at both Xilinx and Advanced Micro Devices.
A longtime industry veteran, Sandeep is a proven innovator and has brought multiple CPUs, GPUs, FPGAs, SoCs and custom designs to market, which together have generated billions of dollars in cumulative revenue. He earned a B.E. in Electronics Engineering from Bangalore University, an M.S. in Electrical Engineering from the New Jersey Institute of Technology and is also a graduate of the Stanford Executive Program.