on-demand webinar

Analog breakthrough, digital performance: Uncompromised power integrity for the whole design, at any scale

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mPower Analog, mPower Digital

Power integrity analysis evaluates circuits to determine if they will provide their designed or intended performance and reliability as implemented. Designers must be able to verify analog and digital power integrity from the RTL/gate level through die-level integrations up to the package and board system-level.

The event focuses on introducing mPower: First Scalable Solution for both analog and digital EM/IR and the only solution that provides an innovative automated power integrity verification that can bring analog and digital EM, IR drop, and power analysis together in a complete, scalable solution, enabling high-confidence power analysis tape-outs for all technologies and across all design types.

The mPower Analog tool provides virtually unlimited power integrity scalability to transistor-level designs to enable fast, accurate, simulation-based, high-capacity dynamic EM/IR analysis on analog designs of any size—from the smallest bandgap reference to large analog systems and sensors.

The mPower Digital tool delivers fast runtimes for the largest digital layouts and chips while providing full coverage for accurate power integrity analysis. Because it uses non-proprietary formats, the mPower Digital solution can be easily integrated into all design and verification flows.

What will you learn

  • Introduction to mPower
  • Understand the features and benefits of mPower toolset
  • How customers are solving their current EMIR problems with mPower Solution and their feedback on mPower
  • Debugging of mPower EMIR Results using mPower GUI and Calibre RVE through a Demo
  • Meet the Speaker


    Ramesh K

    Siemens EDA

    Ramesh is a Senior Application Engineer in the Calibre Design and Manufacturing Solutions of Siemens Digital Industries Software. Ramesh is responsible for supporting Calibre set of products and helping customers in various physical verification flows and design methodologies. He has over a decade of experience in the field of Analog Custom Design flows, Physical Verification, and Sign-off flows. Ramesh holds a B.E. in Electronics & Communication Engineering, M.Tech. in VLSI Design and completed executive training in Artificial Intelligence & Machine Learning

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