live webinar

Size matters – FPGA-based prototyping with the latest high-capacity FPGA enables new use modes

Unlock a new level of design and debug performance with the Veloce proFPGA CS prototyping platform

October 29, 2024 at 04:00 PM Coordinated Universal Time

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Veloce proFPGA CS Development Module
Veloce proFPGA CS Development Module

What you will learn:

With the brand-new AMD VersalVP1902 FPGA device, boasting double the capacity, you can unlock a whole new level of performance and cost-effectiveness. In this webinar you will learn how Siemens’ proFPGA CS prototyping platform, the first commercially available VP1902 system, can improve your FPGA prototyping efficiency, productivity and cost effectiveness.

  • Map more of your design onto a single chip.
  • Run faster than ever before.
  • Reduce the cost per gate by 50% or more.

You will also learn how you to map and debug much larger designs into the multi-FPGA proFPGA platform, by taking advantage of the powerful VPS (Veloce Prototyping Software) tool suite.

Who Should Attend

  • Verification engineers and managers
  • Prototyping engineers
  • Embedded software development engineers
  • System architects and verification engineers
  • HW/SW integration engineers

Meet the speaker

Siemens EDA

Juergen Jaeger

Director of Prototyping Product Strategy

Prior to joining Siemens, Juergen was the director of product management at Cadence Design Systems, responsible for all FPGA-based prototyping activities. Prior to that he worked at Synopsys via the acquisition of Synplicity, where he was product marketing manager for the IKOS V-Station hardware emulation systems for several generations including product launches. Juergen has a master’s degree in electrical engineering from the technical college in Kaiserslautern, Germany. Juergen spent the first part of his career in engineering and application engineering in Germany.

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