Siemens Analogue IC Design Simulation Flow

This webinar will provide an overview of the Siemens analogue custom IC design simulation flow. Starting with S-Edit where the design is captured followed by the simulation set-up. In the simulation setup, the designer has choices of many different analyses types, sweeps and corners that are supported by Analog FastSPICE (AFS). After the simulation has been completed, the results can be analyzed in both the waveform viewer (EZwave) and in S-Edit. EZwave can also be used to post process the simulation results. Cross probing can be performed between the schematic and waveform tools.

What you will learn:

• Setting up the simulation in S-Edit
• Post simulation analysis in both S-Edit and EZwave

Who should attend:

• Analog IC design engineers
• Design engineering managers
• CAD managers