The event discusses recent advancements in process technologies such as FinFET and their impact on parasitic extraction. Layout dependent effects such as DENSITY, LOADING, RETARGETTING, ETCH, CURVILINEAR SRAF/OPC have made the problem of accurate calculation of device and interconnect parasitics highly non-trivial and compute intensive. In this event the lead architect of Calibre xACT will explain the challenges of advanced node extraction.
Analog and digital designers have to spend a lot of time worrying about post-layout simulation, floating metal, BEOL stacks and multiple process corner design closure. Calibre xACT has unique techniques which result in a deterministic and efficient workflow to achieve this goal.
Physical Verification Engineers, Analog and Digital Design Engineers, Analog IP and SOC Leads, CAD Engineers, EMIR & timing signoff Engineer, Power Integrity Engineers, Physical Design engineers, Managers & Directors
Meet the Speakers
Sandeep Koranne
Chief Scientist and Principal Key ExpertSandeep Koranne is a Chief Scientist and Principal Key Expert for Siemens EDA, Oregon, USA. He has close to 25 years of Industrial Experience and has published 2 Books (Springer), 100+ Journal & Conference papers also owns several patents. Sandeep holds a B.E. in Computer Science, perused M.tech from IIT-Delhi & MS in High Order Techniques for Nonlinear Optics.
Smitha Kamathi
Application Consultant - Physical VerificationSmitha Kamathi is an Application Consultant in the Calibre Design and Manufacturing Solutions at Siemens EDA. Smitha has 10+ years of Experience in the Physical verification domain and she is responsible for supporting Calibre products and helping customers in various physical verification flows and design methodologies. Smitha holds her B.E. in Electronics and Communication Engineering from GM Institute of technology.