Next-Generation Advanced IC Packaging

The outburst of IC package complexity drives multiple logic devices and HBM that are integrated using high-performance substrates enabling very high wiring densities and interconnect performance. Monolithic scaling limitations are driving the growth of 2.5/3D multi-die heterogeneous and homogeneously integrated technologies allowing PPA targets to be met. This complexity requires a new design methodology and approach that starts with a focus on integration planning and prototyping where multiple scenarios can be explored and analyzed before any actual Interposer/substrate place and route takes place.

This Webinar focuses on presenting our integrated flow addressing the challenges of prototyping to Signoff for FOWLP, 2.5/3D stacked die designs and other emerging technologies with SI/PI/Thermal/DRC and LVS checks

What you will learn:

• IC packaging trends
• High-Density Advanced Packaging design challenges and solutions
• 2.5D / 3D designs LVS, DRC assembly checks, and PEX
• Siemens-EDA IC packaging / verification product portfolio

Who should attend:

• IC Packaging Engineers / Reviewers
• PCB Designers
• SI/PI Engineers
• PD / PV Engineers
• Managers
• Investors / Directors

Topics covered:

• Workflow of Heterogeneous Packaging
• Comprehensive solution for complex: 2.5D/3D HDAP
• Planning Prototype
• Design Implementation
• Assembly check (LVS / DRC / PEX)
• IC Packaging SI/PI/Thermal analysis