Semiconductor devices such as CPU/AP, DRAM, and SSD have enabled the IT revolution and continue to be a significant driver of new technologies and industries. As the node sizes of the semiconductor devices go to sub-10nm, it becomes a highly challenging task to understand the micro-scale and macro-scale transport phenomena across the whole wafer to achieve a high yield of semiconductor production.
To manufacture a semiconductor device such as a CPU, hundreds of process steps are needed that employ dozens of processing equipment for lithography, diffusion, implantation, etching, deposition, metallization, chemical-mechanical polishing, cleaning, etc.
The understanding of heat transfer and fluid flow of these complex semiconductor manufacturing processes has never been mature due to its complexity and the fast-changing characteristics of the industry. We still primarily rely on trial-and-error and DOE (design of experiments) for process evaluation and tuning. Computational modeling helps us better understand and optimize semiconductor fabrication stages, like etching, deposition, and cleaning through thermal, flow, and reaction simulations, thus significantly impacting product development.
Through this webinar, we aim to share use-cases highlighting how Siemens Simcenter STAR-CCM+ is currently being successfully used in the Semiconductor industry for simulating wafer manufacturing processes.
Senior Application Support Engineer
Chandra Tourani earned his M.S. in Aerospace Engineering from the University of Kansas (KU) in 2011, specializing in high-speed aerodynamics and structures. After graduation, he joined Siemens (formerly CD-adapco) as an Application Engineer supporting customers using STAR-CCM+. During his 11-year tenure at Siemens, he has worked on numerous applications focusing on semiconductor fabrication equipment and their underlying processes. Currently, he is a Senior Application Engineer with CFD competency in multiphase and reactive flows.