On-Demand Webinar

Achieving highest technology performance on interconnect designs with Aprisa


System on a chip (SoC) design

John Mitchell, Principal Engineer from Arm, presents "Achieving Highest Technology Performance on Interconnect Designs using Aprisa." Mitchell describes how his group at Arm used Aprisa's out-of-the-box flow to achieve results very similar to those from their custom handcrafted solution. With Aprisa, there was no need for manual placement grouping, no uncertainties at pre-route, and very few SI violations that can bog down designers with ECOs at the end of the flow. Learn about technology entitlement, a concept that encompasses not just achieving the best performance, power and area (PPA), but doing so with minimal need for guiding the P&R tool, reducing timing ECOs. Technology entitlement provides an optimum balance of return on the effort from the design team to achieve those results.

Overcoming interconnect design challenges

As a market leader for interconnect technologies found in many system-on-chips (SoCs), Arm aims to achieve optimal PPA, consistently close timing with minimal ECOs and get the best return on design effort without sacrificing time to market. To realize the goal of improved time to market with an optimal system, they require a fully automated place-and-route solution that understands interconnect designs. Aprisa showed that it could get them there with minimal effort. See how Aprisa achieved those results at the push of a button.

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