Edge Detection Walkthrough Video Series

The following 9-part video series provides a step-by-step walkthrough of what is needed to take a C++ floating-point algorithm all the way to optimized RTL using Catapult High-Level Synthesis.

The video modules are broken down into the following nine categories: We start first with a basic overview of the Catapult flow using a simple design. Module 1 provides an overview of the edge detection algorithm. In module 2 we convert the floating-point algorithm to use bit-accurate data types. Module 3 then makes the algorithm synthesizable. Module 4 uses a sliding window memory architecture in order to improve performance. In module 5 we add multi-block concurrency to achieve the highest performance. Module 6 consists of converting from a dual port to a single port memory architecture. Module 7 involves making the hardware more configurable. In module 8 we finish up by converting the memory architecture to use a circular buffer memory architecture to reduce power.

If you would like to step through this design you can do so by downloading the this file HERE: https://github.com/hlslibs/hls_tutorials/tree/master/WalkThroughs/EdgeDetect/src

Enhance Your Layout Productivity Using Schematic Driven Layout (SDL)

June 10, 2021

Live Webinar


This webinar will provide an overview of how to take a schematic from S-Edit and push your netlist directly to L-Edit using Schematic Driven Layout (SDL). We will also cover productivity features in L-Edit that will allow the layout designer to quickly arrange instances and draw and verify routing connections based upon the connectivity that is transmitted using SDL.

What you will learn:
  • Pushing a schematic netlist from S-Edit to L-Edit
  • Using flylines in L-Edit
  • Manual assisted routing in L-Edit
  • Using the SDL Navigator in L-Edit
  • Checking connectivity in L-Edit on routed nets
  • Syncronization between S-Edit and L-Edit
  • ECO indications
Who should attend:
  • Analog IC layout engineers
  • Layout managers

Register now!

Meet the speakers

Photo of Karen Lujan

Karen Lujan

Product Management

Karen Lujan is a Product Line Manager for the Integrated Circuit Design Solutions Division of Siemens EDA. Karen brings a wealth of experience as a Sales Support Manager and Engineer – having served in both delivery and management roles. Karen holds a BS in Electrical Engineering and an MBA with a Technology Management focus.