Catapult AI NN – From AI/ML Framework to Optimized RTL
As demand for Machine Learning increases, the need for custom hardware acceleration is exploding. Developing hardware that is optimally tuned for Performance, Power & Area (PPA) and optimized to the network and application delivers enormous competitive advantages in silicon. Designers working in AI/ML Frameworks such as TensorFlow, PyTorch have previously relied on “rule of thumb” or RTL design teams to assess the cost of implementation. Catapult AI NN now delivers a methodology and flow from “AI/ML Framework to RTL” enabling rapid exploration of network, quantization, design reuse factors on a layer-by-layer basis for PPA, generating production-ready custom RTL without needing extensive HLS knowledge or RTL skills.
Vorstellung des Referenten
Stuart Clubb
Technical Product Management Director
Stuart is responsible for Catapult HLS Synthesis and Verification Solutions since July 2017. Prior to this role, Stuart had been successfully managing the North American FAE team for Mentor/Siemens and Calypto Design Systems and was key to the growth achieved for the CSD products after the Calypto acquisition. Moving from the UK in 2001 to work at Mentor Graphics, Stuart held the position of Technical Marketing Engineer, initially on the Precision RTL synthesis product for 6 years and later on Catapult for 5 years. He has held various engineering and application engineering roles ASIC and FPGA RTL hardware design and verification. Stuart graduated from Brunel University, London, with a Bachelors of Science.
Verwandte Ressourcen
HLS for Vision and Deep Learning Hardware Accelerators Seminar
8 part technical HLS video series with real examples applying it to computer vision and deep learning implementation.
Rapid Algorithm to HW: Using HLS for Computer Vision and Deep Learning Seminar
How HLS helps project teams rapidly & accurately explore power/performance of algorithms, quickly get to FPGA implementations to create demonstrator/prototypes & use same source RTL IP for ASIC implementation.
Edge Detection Walkthrough Video Series
9-part series provides a step-by-step walkthrough of what's needed to take a C++ floating-point algorithm all the way to optimized RTL using Catapult.