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Infineon: Implementing Functionally Safe designs for the EV market through an efficient and reliable P&R flow

Odhadovaná doba sledování: 29 min

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The automotive EV industry requires chip designs operating reliably at high voltages, while ensuring functional safety. Reliability involves adding redundancy of safety-critical logic physically separated on-chip, and an accurate battery pack monitoring to enable the system to cut-off current in the case of an accident. Infineon's PSoC4HVPA-SPM addresses issues in High Voltage Li Ion Battery Pack Monitoring applications using shunt-based current sensing. This design was implemented using the PSoC platform, which is a combination of 3rd party IPs, providing high degree of flexibility (configurable and programmable). The internal communication protocol IP, iso UART, communicates with other Battery Management IC's in the system, such as Infineon's TLE family of devices. This evolving protocol required a significant number of additional logic gates to resolve issues identified after the initial silicon, and other updates. To handle the logic placement and complex clock tree structures efficiently, our team used Aprisa for P&R. Aprisa offered great controllability for placement and distance verification of the safety critical modules, and an intuitive methodology to handle functional ECOs, with incremental P&R. This resulted in minimal implementation costs and avoided a full flow re-implementation of the design.

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Infineon Technologies

Pradeep Patil

Principal Engineer

Pradeep Patil is a Principal Engineer with Infineon Technologies in the Automotive Micro Controller PSoC division, since 2019. He is responsible for RTL2GDS chip integration activities of Infineon’s automotive chips used in battery monitoring, automotive touch controllers for OLED, liquid level sensors, and heating systems. Prior to Infineon, Pradeep worked as a Physical Design Consultant at Qualcomm in the High Performance CPU Core and Memory Sub Systems team, and at LSI Technologies (Currently Broadcom), in the Design Tool Methodologies group, developing RTL2GDS flows for storage and networking chips. Pradeep holds a Masters in Micro Electronics and Control Systems from Visvesvaraya Technological University, in Karnataka, India.

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