Automating Post-Route Verification for Multi-Gigabit Channels

Performing post-layout verification of multi-gigabit SerDes channels
is a challenging but necessary task, because even the most detailed
pre-layout simulation studies and routing guidelines can’t anticipate
everything. Designs that meet detailed routing requirements can still
fail due to discontinuities and resonances that couldn’t have been
anticipated.

The large numbers of channels in modern designs makes post-route
verification difficult – each channel must be modeled and analyzed
individually, which requires an automated, efficient process to be
successful. Once modeled, each channel must be analyzed for compliance
with protocol requirements in the same automated fashion. This webinar
will discuss requirements for effective SerDes channel post-route
verification and show how they can be achieved.