This video describes how Nvidia adopted a Mixed-Signal platform for the verification of their NVLink and DDR PHYs with desired throughput and accuracy.
Data centers have adopted newer processing techniques with Graphics Processing Units (GPUs) to support emerging AI and deep learning workloads. In order to solve live size problems, GPUs need high bandwidth in both GPU to GPU and GPU to memory interfaces. The GPU to GPU interface is implemented by nVidia’s NVLink High Speed PHYs comprising of complex mixed-signal circuitry with a significant amount of digital interlaced with analog. The high bandwidth memory interfaces use DDR PHYs with DLL based clocking circuits which are very sensitive to device noise and PVT variations.